In one modulation format commonly used in communication systems, data signals modulate a pair of quadrature-related carrier signals, i.e. carrier signals having the same frequency and a phase angle of 90 degrees therebetween. Such modulation is referred to by a variety of names, such as quadrature amplitude modulation (QAM), phase shift keying (PSK) or amplitude and phase shift keying (APSK). The data signal can, of course, represent a virtually limitless array of information, such as voice, video, facsimile and the like. In addition, the transmission channel propagating the modulated carrier signals is also not limited, and, at present, may include air, wire or lightguide.
In communications systems in which modulated quadrature-related carrier signals are transmitted, recovery of the data signals is controlled by carrier and timing recovery circuits within the receiver which respectively generate replicas of the carrier and timing signals used in the transmitter. In particular, the carrier recovery circuit generates local carrier signals which are used to demodulate the quadrature-related carrier signals and the timing recovery circuits are used to generate clock signals which sample the demodulated carrier signals.
In certain system applications, time-varying distorting is introduced into the transmitted carrier signals that is so severe that the carrier and timing recovery circuits are no longer synchronized to the transmitted carrier signals and the data signals can not be recovered. This loss of synchronization is commonly referred to by saying the timing and/or carrier recovery circuits are "out of lock". In the event, such circuits must reacquire synchronization and the time required for this to be accomplished is referred to as the acquisition time. Another parameter pertinent to the performance of carrier and/or timing recovery circuits during loss of synchronization is the acquisition range, i.e., the range of frequency and phase over which such circuits can regain synchronous operation.
While the acquisition time and range of existing carrier and timing recovery circuitry are satisfactory in many system applications, there are applications where these parameters do not meet the desired system performance objectives. In addition, problems relating to hysteresis of existing circuits, phase jitter, and false locking, i.e., locking onto the wrong frequency and/or phase has also arisen. Accordingly, carrier and timing recovery circuits with improved performance in these areas would be highly desirable.